Table of contents for Methodology for the digital calibration of analog circuits and systems : with case studies / by Marc Pastre and Maher Kayal.


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1.  INTRODUCTION                                             1
1  Context                                              1
2  Objectives                                           2
3  Compensation methodology                             2
4  Applications of the compensation methodology          2
5  Book organization                                     3
2.   AUTOCALIBRATION AND COMPENSATION TECHNIQUES             5
1  Introduction                                         5
2  Matching                                              5
2.1 Matching rules                                   6
2.2  Matching parameters                             6
3  Chopper stabilization                                 7
3.1 Principle                                        7
3.2  Analysis                                        8
3.3 Implementation                                   9
4  Autozero                                             11
4.1 Principle                                       11
4.2  Analysis                                       12
4.3  Noise                                          14
5  Correlated double sampling                           18
6  Ping-pong                                            18
7  Other techniques                                    20
8  Classification                                        21
9  Conclusion                                            22
3.   DIGITAL COMPENSATION CIRCUITS AND SUB-BINARY
DIGITAL-TO-ANALOG CONVERTERS                             23
1  Introduction                                         23
2  Digital compensation                                  23
3  Successive approximations                             24
3.1 Principle                                        25
3.2  Working condition                               28
3.3  Reverse successive approximations algorithm     29
3.4  Complexity                                      31
4  Sub-binary radix DACs                                 31
4.1 Use of sub-binary DACs for successive approximations  31
4.2  Characteristics                                 32
4.3  Resolution                                      34
4.4  Tolerance to radix variations                   34
5  Component arrays                                      35
5.1  Sizing                                          36
6  Current sources                                       38
6.1 Current-mirror DAC                               39
7  R/2R ladders                                          40
8  Linear current division using MOS transistors         41
8.1 Principle                                        41
8.2  Second-order effects                            45
8.3  Parallel configuration                          45
8.4  Series configuration                            46
9  M/2M ladders                                          48
9.1 Principle                                        48
9.2  Complementary ladder                            49
9.3  Second-order effects                            50
9.4  Trimming                                        51
10 R/xR ladders                                          51
10.1 Principle                                       51
10.2 Working condition                               53
10.3 Terminator calculation                          54
10.4 Terminator implementation                       55
10.5 Ladder sizing                                   57
10.6 Terminator sizing                               58
10.7 Radix                                           60
11 M/2+M ladders                                        62
11.1 M/3M ladders                                    62
11.2 M/2.5M ladders                                  64
11.3 Ladder selection and other M/2+M ladders        65
11.4 Current collector design                        67
11.5 Complementary ladders                           72
11.6 Layout                                          72
11.7 Measurements                                    73
12 Comparison                                           77
13 Linear DACs based on M/2+M converters                78
13.1 Principle                                       78
13.2 Calibration algorithm                           81
13.3 Radix conversion algorithm                      84
13.4 Digital circuit implementation                  85
13.5 Analog circuit implementation                   87
13.6 Compensation of temperature variations          90
13.7 Comparison with other self-calibrated converters  90
14 Conclusion                                           91
I. METHODOLOGY FOR CURRENT-MODE DIGITAL
COMPENSATION OF ANALOG CIRCUITS                          93
1  Introduction                                         93
2  Two-stage Miller operational amplifier               93
3  Compensation current technique                       96
3.1 Detection configuration                          97
3.2  Detection node                                 100
3.3  Compensation node                              105
3.4  DAC resolution                                 113
3.5  Low-pass decision filtering                    114
3.6  Continuous-time compensation                   115
3.7  Up/down DAC                                    117
4  Simulation with digital compensation circuits        124
4.1 Principle                                       125
4.2  Automatic compensation component               126
4.3  Compensation component during adjustment       128
4.4  Compensation component during compensation     130
4.5  Multiple digital compensation                  133
4.6  Example of implementation for PSpice           134
4.7  Offset compensation of the Miller amplifier     136
5  Application to SOI IT DRAM calibration               138
5.1  1-transistor SOI memory cell                   139
5.2  Memory cell imperfections                      140
5.3  Sensing scheme                                 141
5.4  Calibration principle                          144
5.5  Calibration algorithm                          146
5.6  Measurements                                   147
6  Conclusion                                           148
5.   HALL MICROSYSTEM WITH CONTINUOUS DIGITAL
GAIN CALIBRATION                                        151
1  Introduction                                         151
2  Integrated Hall sensors                              151
2.1 Hall effect                                      152
2.2  Hall sensors                                   153
2.3  Hall sensor models                             155
3  Spinning current technique                           157
4  Sensitivity calibration of Hall sensors              160
4.1  Sensitivity drift of Hall sensors               161
4.2 Integrated reference coils                      162
4.3  Sensitivity calibration                         163
4.4  State of the art                               166
5  Hall sensor microsystems                             171
5.1 Analog front-ends for current measurement        171
6  Continuous digital gain calibration technique        173
6.1 Principle                                        173
6.2  Combined modulation scheme                      175
6.3  Demodulation schemes                           176
6.4  Gain compensation                               179
6.5  Offset compensation                             183
6.6  Noise filtering                                 184
6.7  Delta-sigma analog-to-digital converter         189
6.8  Rejection of signal interferences               193
7  Conclusion                                           197
6.  IMPLEMENTATION OF THE HALL MICROSYSTEM
WITH CONTINUOUS CALIBRATION                             199
1  Introduction                                         199
2  Hall sensor array                                     199
3  Preamplifier                                          201
3.1 Programmable gain range preamplifier             201
3.2  DDA                                             202
3.3  Operational amplifier                           207
4  Demodulators                                          208
4.1  Switched-capacitor integrators                  209
4.2  External signal demodulator                     213
4.3  Reference demodulator                           216
4.4  Offset demodulator                              220
5  Delta-sigma modulator                                 221
6  System improvements                                   224
6.1 Compensation of the reference demodulator offset  224
6.2  Coil-sensor capacitive coupling                 225
6.3  External interferences                          226
6.4  Alternate modulation/demodulation schemes       227
7  System integration                                    230
7.1  Configuration and measurement possibilities     230
7.2 Integrated circuit                               231
7.3  Measurement results                             233
8  Conclusion                                            240
7.   CONCLUSION                                              241
1  Highlights                                           241
2  Main contributions                                    242
3  Perspectives                                          242



Library of Congress subject headings for this publication: Electronic circuits, Analog electronic systems Calibration, Digital-to-analog converters