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1. Introduction. A Brief History. Book Summary. MOS Transistors. CMOS Logic. CMOS Fabrication and Layout. Design Partitioning. Example: A Simple MIPS Microprocessor. Logic Design. Circuit Design. Physical Design. Design Verification. Fabrication, Packaging, and Testing. Summary. Exercises. 2. MOS Transistor Theory. Introduction. Ideal I-V Characteristics. C-V Characteristics. Nonideal I-V Effects. DC Transfer Characteristics. Switch-Level RC Delay Models. Pitfalls and Fallacies. Summary. Exercises. 3. CMOS Processing Technology. Introduction. CMOS Technologies. Layout Design Rules. CMOS Process Enhancements. Technology Related CAD Issues. Manufacturing Issues. Pitfalls and Fallacies. Historical Perspective. Summary. Exercises. References. 4. Circuit Characterization and Performance Estimation. Introduction. Delay Estimation. Logical Effort and Transistor Sizing. Power Disruption. Interconnect. Wire Engineering. Design Margin. Reliability. Scaling. Pitfalls and Fallacies. Historical Perspective. Summary. Exercises. 5. Circuit Simulation. Introduction. A SPICE Tutorial. Device Models. Device Characterization. Interconnect Simulation. Pitfalls and Fallacies. Summary. Exercises. 6. Combinational Circuit Design. Introduction. Circuit Families. Circuit Pitfalls. More Circuit Families. Comparison of Circuit Families. Silicon-on-Insulator Circuit Design. Pitfalls and Fallacies. Historical Perspective. Summary. Exercises. 7. Sequential Circuit Design. Introduction. Sequencing Static Circuits. Circuit Design of Latches & Flip-Flops. Static Sequencing Element Methodology. Sequencing Dynamic Circuits. Synchronizers. Wave Piplining. Pitfalls and Fallacies. Case Study: Pentium 4 and Itanium 2 Sequencing Methodologies. Summary. Exercises. 8. Design Methodology and Tools. Introduction. Structured Design Strategies. Basic Design Methods. Design Flows. Behavioral/Functional Synthesis Design Flow (ASIC Design Flow). Programmed Behavioral Synthesis. Automated Layout Generation. Mixed Signal or Custom Design Flow. Additional Design Interchange Formats. Design Economics. Data Sheets and Documentation. Closing the Gap Between ASIC and Custom. Historical Perspective. Pitfalls and Fallacies. Exercises. Appendix I: CMOS Physical Design Styles. Appendix II: Logic Optimization. 9. Testing and Verification. Introduction. A Walk Through the Test Process. Reliability. Logic Verification Principles. Silicon Debug Principles. Manufacturing Test Principles. Design for Testability. Boundary Scan. Pitfalls and Fallacies. Historical Perspective. Summary. Exercises. Appendix I: MIL-STD-883 10. Datapath Subsystems. Introduction. Addition/Subtraction. One/Zero Detectors. Comparators. Counters. Boolean Logical Operations. Coding. Shifters. Multiplication. Parallel Prefix Computations. Pitfalls and Fallacies. Historical Perspective. Summary. Exercises. 11. Array Subsystems. Introduction. SRAM. Special-Purpose RAMs. DRAM. Read Only Memory. Content-Addressable Memory. Programmable Logic Arrays. Historical Perspective. Summary. Exercises. 12. Special-Purpose Subsystems. Introduction. Packaging. Power Distribution. I/O. CLock. Analog Circuits. Pitfalls and Fallacies. Historical Perspective. Summary. Exercises. Appendix A: Verilog. Introduction. Behavioral Modeling with Continuous Assignments. Basic Constructs. Behavioral Modeling with Always Blocks. Finite State Machines. Structural Primitives. Test Benches. Verilog. Pitfalls. Examples: MIPS Processor. Appendix B: VHDL. Introduction. Behavioral Modeling with Concurrent Signal Assingments. Basic Constructs. Behavioral MOdeling with Process Statements. Finite State Machines. Parameterized Blocks. Examples: MIPS Processor.
Library of Congress Subject Headings for this publication: Rev, ed, of: Principles of CMOS VLSI design, 1993, Integrated circuits Very large scale integration design and construction, Metal oxide semiconductors, Complementary